LEDs Under the Thumb

Dr Giles Humpston, Applications Manager
Cambridge Nanotherm 

LEDs do two things really well. They emit light and heat, in roughly equal measures. The light is generally useful, the heat less so. Heat and LEDs do not make good bedfellows so when designing a solidstate light source, as much care needs to be taken in removing the heat as managing the photons.

Keeping LEDs cool is a relatively straightforward endeavour requiring some form of thermally conductive pathway between the semiconductor junction and the heat sink. This pathway needs to have a thermal resistance as far as possible below some maximum, which can be calculated using a finite element or similar thermal model simulator. Unfortunately licences for these sophisticated computer programs do not come cheap, particularly if the requirement is only for a few designs each year.

Rule of thumbWithout access to suitable computer models, the LED thermal designer is forced to resort to using ‘rules of thumb’. The most common is that heat spreads at 45 degrees. When applied to lumps of homogeneous material this rule works better than a wild guess and at least gives an answer in the right ball park. The problem is that the typical thermal path between an LED and a heat sink is not a solid lump of homogeneous material. Usually it comprises a complex stack of materials, such as the LED package, die attach solder, circuit board, thermal interface material, heat spreader and many more. Each of these structures will have radically different dimensions, thermal conductivities and specific heat capacities, with various interface resistances between all the different layers. The net result is that applying the 45 degree rule is decidedly dodgy.

Any LED capable of producing a respectable number of Lumens will be mounted on a metal-in-board PCB. Typically, these comprise a copper circuit layer on an aluminium plate separated by a dielectric. Depending on the grade of the board the thermal conductivity of the dielectric can range from 3–10 W/mK, with the more important metric of thermal resistance also taking into account the thickness of the layer. LEDs soldered to the copper dissipate heat through a combination of axial conduction through the thickness and radial spreading. This dual approach to cooling makes these boards particularly suitable for the new generation of chip sized LEDs (i.e. CSP) as the small dimensions and medium power necessitates management of intense thermal flux.

By running a finite element model on a metal-in-board PCB it is possible to come up with a useful rule of thumb. That is, for a CSP LED on a board carrying 1oz copper (35μm thick) and possessing respectable thermal attributes, the useful copper area is a disc about 35mm diameter. This provides the lowest thermal resistance path by optimising the balance between the axial and radial conduction. If the copper area is smaller, too much reliance is placed on axial conduction so the thermal resistance goes up. This means that close packing of CSP LEDs can result in thermal as well as optical problems. Conversely making the copper area larger has little benefit because of the in-plane thermal resistance of the thin copper layer. The oft-cited approach to improving the cooling of CSP LEDs, namely doubling the thickness of the copper does not change the optimum copper area because the in-plane thermal conductivity of a 70um thick plane of copper on a decent quality of metal-in-board PCB is still low relative to the high axial thermal conductivity of the dielectric.

While experienced designers of thermal management systems for LEDs will be uncomfortable with sticking with a “35 um/35 mm” rule of thumb, if your only design tool is a sharp pencil and the back of an envelope, it is better than guesswork and hot LEDs.

CN_HumpstonAbout the Author 
Dr. Giles Humpston is a metallurgist by profession and has a doctorate in alloy phase equilibria.  He is a cited inventor on more than 250 patents and has co-authored over 150 papers as well as several text books.  Dr Humpston currently works as the Field Applications Manager for Cambridge Nanotherm on thermal substrate technologies.


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